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 Features
* Industry-standard Architecture
- Low-cost, Easy-to-use Software Tools
* High-speed, Electrically Erasable Programmable Logic Devices
- 5 ns Maximum Pin-to-pin Delay
* CMOS- and TTL-compatible Inputs and Outputs
- Latch Feature Holds Inputs to Previous Logic States
* Pin-controlled Standby Power (10 A Typical) * Advanced Flash Technology *
- Reprogrammable - 100% Tested High-reliability CMOS Process - 20-year Data Retention - 100 Erase/Write Cycles - 2,000V ESD Protection - 200 mA Latch-up Immunity Dual Inline and Surface Mount Packages in Standard Pinouts PCI-compliant True Input Transition Detection "Z" and "QZ" Version
* * *
Highperformance EE PLD ATF22V10C ATF22V10CQ
See separate datasheet for ATF22V10CZ and ATF22V10CQZ options.
24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN
Pin Configurations
All Pinouts Top View
Pin Name CLK IN I/O GND VCC PD Function Clock Logic Inputs Bi-directional Buffers Ground +5V Supply Power-down PLCC
IN IN CLK/IN VCC* VCC I/O I/O
TSSOP
CLK/IN IN IN IN/PD IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12
DIP/SOIC
CLK/IN IN IN IN/PD IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN
4 3 2 1 28 27 26
Note:
For all PLCCs (except "-5"), pins 1, 8, 15 and 22 can be left unconnected. However, if they are connected, superior performance will be achieved.
Rev. 0735P-PLD-01/02
IN IN GND GND* IN I/O I/O
12 13 14 15 16 17 18
IN/PD IN IN GND* IN IN IN
5 6 7 8 9 10 11
25 24 23 22 21 20 19
I/O I/O I/O GND* I/O I/O I/O
1
Logic Diagram
Description
The ATF22V10C is a high-performance CMOS (electrically erasable) programmable logic device (PLD) that utilizes Atmel's proven electrically erasable Flash memory technology. Speeds down to 5 ns and power dissipation as low as 100 A are offered. All speed ranges are specified over the full 5V 10% range for industrial temperature ranges, and 5V 5% for commercial temperature ranges. Several low-power options allow selection of the best solution for various types of power-limited applications. Each of these options significantly reduces total system power and enhances system reliability.
Absolute Maximum Ratings*
Temperature under Bias .................................. -40C to +85C Storage Temperature ..................................... -65C to +150C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V(1) Voltage on Input Pins with Respect to Ground during Programming .....................................-2.0V to +14.0V(1) Note: Programming Voltage with Respect to Ground .......................................-2.0V to +14.0V(1) 1. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC, which may overshoot to 7.0V for pulses of less than 20 ns.
DC and AC Operating Conditions
Commercial Operating Temperature (Ambient) VCC Power Supply 0C - 70C 5V 5% Industrial -40C - 85C 5V 10%
2
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
Compiler Mode Selection
PAL Mode (5828 Fuses) Synario WINCUPL Note: ATF22V10C (DIP) ATF22V10C (PLCC) P22V10 P22V10LCC GAL Mode (5892 Fuses) ATTF22V10C DIP (UES) ATF22C10C PLCC (UES) G22V10 G22V10LCC Power-down Mode(1) (5893 Fuses) ATF22V10C DIP (PWD) ATF22V10C PLCC (PWD) G22V10CP G22V10CPLCC
1. These device types will create a JEDEC file which when programmed in ATF22V10C devices will enable the power-down mode feature. All other device types have the feature disabled.
DC Characteristics
Symbol IIL IIH Parameter Input or I/O Low Leakage Current Input or I/O High Leakage Current Condition 0 VIN VIL (Max) 3.5 VIN VCC C-5, 7, 10 C-10 ICC Power Supply Current, Standby VCC = Max, VIN = Max, Outputs Open C-15 C-15 CQ-15 CQ-15 C-5, 7, 10 C-10 ICC2 Clocked Power Supply Current VCC = Max, Outputs Open, f = 15 MHz C-15 C-15 CQ-15 CQ-15 IPD IOS(1) VIL VIH VOL Power Supply Current, PD Mode Output Short Circuit Current Input Low Voltage Input High Voltage VIN = VIH or VIL, VCC = Min VIN = VIH or VIL, VCC = Min IOL = 16 mA IOL = 12 mA IOH = -4.0 mA Com., Ind. Mil. 2.4 VCC = Max VIN = 0, Max VOUT = 0.5V -0.5 2.0 Com. Ind. Com. Ind. Com. Ind. Com. Ind. Com. Ind. Com. Ind. Com. Ind. 70.0 70.0 40.0 40.0 10.0 10.0 85.0 90.0 65.0 65.0 35.0 35.0 Min Typ -35.0 Max -10.0 10.0 130.0 140.0 90.0 115.0 55.0 70.0 150.0 160.0 90.0 90.0 60.0 80.0 100.0 100.0 -130.0 0.8 VCC+0.75 0.5 0.5 Units A A mA mA mA mA mA mA mA mA mA mA mA mA A A mA V V V V V
Output Low Voltage
VOH Note:
Output High Voltage
1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
3
0735P-PLD-01/02
AC Waveforms (1)
Note:
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
AC Characteristics(1)
-5 Symbol tPD tCO tCF tS tH Parameter Input or Feedback to Combinatorial Output Clock to Output Clock to Feedback Input or Feedback Setup Time Hold Time External Feedback 1/(tS + tCO) fMAX Internal Feedback 1/(tS + tCF) No Feedback 1/(tWH + tWL) tW tEA tER tAP tAW tAR tSP tSPR Notes: Clock Width (tWL and tWH) Input or I/O to Output Enable Input or I/O to Output Disable Input or I/O to Asynchronous Reset of Register Asynchronous Reset Width Asynchronous Reset Recovery Time Setup Time, Synchronous Preset Synchronous Preset to Clock Recovery Time 3.0 0 142.0 166.0 166.0 3.0 2.0 2.0 3.0 5.5 4.0 4.0 4.0 6.0 5.0 7.0 Min 1.0 1.0 Max 5.0 4.0 2.5 3.5 0 125.0
(3)
-7 Min 3.0 2.0 Max 7.5 4.5(2) 2.5 4.5 0 90.0 Min 3.0 2.0
-10 Max 10.0 6.5 2.5 10.0 0 55.5 80.0 83.3 6.0 10.0 9.0 12.0 3.0 3.0 3.0 Min 3.0 2.0
-15 Max 15.0 8.0 2.5 Units ns ns ns ns ns MHz MHz MHz ns 15.0 15.0 20.0 15.0 10.0 10.0 10.0 ns ns ns ns ns ns ns
142.0 166.0 3.0 3.0 3.0 3.0 7.0 5.0 4.5 5.0 7.5 7.5 10.0
117.0 125.0 3.0 3.0 3.0 3.0 8.0 6.0 6.0 8.0
1. See ordering information for valid part numbers. 2. 5.5 ns for DIP package devices. 3. 111 MHz for DIP package devices.
4
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
Power-down AC Characteristics(1)(2)(3)
-5 Symbol tIVDH tGVDH tCVDH tDHIX tDHGX tDHCX tDLIV tDLGV tDLCV tDLOV Notes: Parameter Valid Input before PD High Valid OE before PD High Valid Clock before PD High Input Don't Care after PD High OE Don't Care after PD High Clock Don't Care after PD High PD Low to Valid Input PD Low to Valid OE PD Low to Valid Clock PD Low to Valid Output 1. Output data is latched and held. 2. High-Z outputs remain high-Z. 3. Clock and input transitions are ignored. Min 5.0 0 0 5.0 5.0 5.0 5.0 15.0 15.0 20.0 Max Min 7.5 0 0 7.0 7.0 7.0 7.5 20.0 20.0 25.0 -7 Max Min 10.0 0 0 10.0 10.0 10.0 10.0 25.0 25.0 30.0 15.0 15.0 15.0 15.0 30.0 30.0 35.0 -10 Max Min 15.0 0 -15 Max Units ns ns ns ns ns ns ns ns ns ns
Input Test Waveforms and Measurement Levels
Commercial Output Test Loads
Pin Capacitance
f = 1 MHz, T = 25C(1)
Typ CIN COUT Note: 5 6 Max 8 8 Units pF pF Conditions VIN = 0V VOUT = 0V
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
0735P-PLD-01/02
Power-up Reset
The registers in the ATF22V10Cs are designed to reset during power-up. At a point delayed slightly from VCC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the output buffer. This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the uncertainty of how VCC actually rises in the system, the following conditions are required: 1. The VCC rise must be monotonic, and starts below 0.7V, 2. After reset occurs, all input and feedback setup times must be met before driving the clock pin high, and 3. The clock must remain stable during tPR.
V RST
POWER
t PR
REGISTERED OUTPUTS
tW
CLOCK
tS
Preload of Registered Outputs
The ATF22V10C's registers are provided with circuitry to allow loading of each register with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC file preload sequence will be done automatically by most of the approved programmers after the programming. There are 64 bits of programmable memory that are always available to the user, even if the device is secured. These bits can be used for user-specific data.
Parameter tPR VRST Description Power-up Reset Time Power-up Reset Voltage Typ 600 3.8 Max 1,000 4.5 Units ns V
Electronic Signature Word
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying of the ATF22V10C fuse patterns. Once programmed, fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible. The security fuse should be programmed last, as its effect is immediate.
Programming/ Erasing
Programming/erasing is performed using standard PLD programmers. See "CMOS PLD Programming Hardware & Software Support" for information on software/programming.
6
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
Input and I/O Pinkeeper Circuits
The ATF22V10C contains internal input and I/O pin-keeper circuits. These circuits allow each ATF22V10C pin to hold its previous value even when it is not being driven by an external source or by the device's output buffer. This helps to ensure that all logic array inputs are at known valid logic levels. This reduces system power by preventing pins from floating to indeterminate levels. By using pin-keeper circuits rather than pull-up resistors, there is no DC current required to hold the pins in either logic state (high or low). These pin-keeper circuits are implemented as weak feedback inverters, as shown in the Input Diagram below. These keeper circuits can easily be overdriven by standard TTLor CMOS-compatible drivers. The typical overdrive current required is 40 A.
Input Diagram
I/O Diagram
7
0735P-PLD-01/02
Power-down Mode
The ATF22V10C includes an optional pin-controlled power-down feature. When this mode is enabled, the PD pin acts as the power-down pin (Pin 4 on the DIP/SOIC packages and Pin 5 on the PLCC package). When the PD pin is high, the device supply current is reduced to less than 100 mA. During power-down, all output data and internal logic states are latched and held. Therefore, all registered and combinatorial output data remain valid. Any outputs that were in an undetermined state at the onset of powerdown will remain at the same state. During power-down, all input signals except the power-down pin are blocked. Input and I/O hold latches remain active to ensure that pins do not float to indeterminate levels, further reducing system power. The powerdown pin feature is enabled in the logic design file. Designs using the power-down pin may not use the PD pin logic array input. However, all other PD pin macrocell resources may still be used, including the buried feedback and foldback product term array inputs. PD pin configuration is controlled by the design file, and appears as a separate fuse bit in the JEDEC file. When the power-down feature is not specified in the design file, the IN/PD pin will be configured as a regular logic input.
Note: Some programmers list the 22V10 JEDEC compatible 22V10C (no PD used) separately from the non-22V10 JEDEC compatible 22V10CEX (with PD used).
8
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
Functional Logic Diagram ATF22V10C
9
0735P-PLD-01/02
ATF22V10C/CQ SUPPLY CURRENT VS. SUPPLY VOLTAGE (T A = 25C)
140.0
CC
ATF22V10C/CQ NORMALIZED ICC VS. TEMPERATURE
1.1
120.0 100.0 ICC (mA) 80.0 60.0 40.0 20.0 0.0 4.50 4.75 5.00
C-5, -7, -10 C-15 CQ-15
NORMALIZED I
1.0
0.9
5.25
5.50
0.8 -40.0
0.0
25.0
75.0
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
ATF22V10C/CQ SUPPLY CURRENT VS. INPUT FREQUENCY (V CC = 5V, TA = 25C)
120.0 C-5, 7, 10 ICC (mA) 80.0 C-15 CQ-15
0.0 -10.0 -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 -80.0 -90.0
ATF22V10C/CQ OUTPUT SOURCE CURRENT VS. OUTPUT VOLTAGE (VCC = 5V, TA = 25C)
40.0
0.0 0.0 10.0 20.0 50.0 FREQUENCY (MHz)
IOH (mA)
0.0
0.5
1.0
1.5
2.0
2.5 VOH (V)
3.0
3.5
4.0
4.5
5.0
ATF22V10C/CQ OUTPUT SOURCE CURRENT VS. SUPPLY VOLTAGE (V OH = 2.4V)
0.0 -5.0 -10.0 -15.0 -20.0 -25.0 -30.0 -35.0 -40.0 -45.0 -50.0 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 5.5 6.0
140.0 120.0 100.0 IOL (mA) 80.0 60.0 40.0 20.0 0.0 0.0
ATF22V10C/CQ OUTPUT SINK CURRENT VS. SUPPLY VOLTAGE (V OL = 0.5V)
IOH (mA)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
ATF22V10C/CQ OUTPUT SINK CURRENT VS. SUPPLY VOLTAGE (V OL = 0.5V)
46.0 45.0 44.0 43.0 42.0 41.0 40.0 39.0 38.0 37.0 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 5.5 6.0
ATF22V10C/CQ INPUT CLAMP CURRENT VS. INPUT VOLTAGE (V CC = 5V, TA = 35C)
0.0 INPUT CURRENT mA) -20.0 -40.0 -60.0 -80.0 -100.0 -120.0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 INPUT VOLTAGE (V)
IOL (mA)
10
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
ATF22V10C/CQ NORMALIZED TCO VS. TEMPERATURE
1.1 NORMALIZED T
CO
ATF22V10C/CQ NORMALIZED TPD VS. VCC
1.2
PD
NORMALIZED T
1.1 1.0 0.9 0.8 4.50
1.0
0.9
4.75
5.00 SUPPLY VOLTAGE (V)
5.25
5.50
0.8 -40.0
0.0
25.0
75.0
TEMPERATURE (C)
ATF22V10C/CQ NORMALIZED TCO VS. VCC
1.3
CO
ATF22V10C/CQ NORMALIZED T SU VS. TEMPERATURE
1.1 NORMALIZED T
CO
NORMALIZED T
1.2 1.1 1.0 0.9 0.8 4.50
1.0
0.9
4.75
5.00 SUPPLY VOLTAGE (V)
5.25
5.50
0.8 -40.0
0.0
25.0
75.0
TEMPERATURE (C)
ATF22V10C/CQ NORMALIZED T SU VS. VCC
1.2
SU
ATF22V10C/CQ DELTA TPD VS. OUTPUT LOADING
8.0 DELTA T PD (ns) 6.0 4.0 2.0 0.0 -2.0
NORMALIZED T
1.1 1.0 0.9 0.8 4.50
4.75
5.00
SUPPLY VOLTAGE (V)
5.25
5.50
0
50
100
150
200
250
300
OUTPUT LOADING (pF)
ATF22V10C/CQ NORMALIZED T PD VS. TEMPERATURE
1.1
PD
ATF22V10C/CQ DELTA TPD VS. NUMBER OF OUTPUT SWITCHING
0.0 DELTA T PD (ns) -0.1 -0.2 -0.3 -0.4 -0.5
NORMALIZED T
1.0
0.9
0.8 -40.0
0.0
25.0
75.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
TEMPERATURE (C)
NUMBER OF OUTPUTS SWITCHING
11
0735P-PLD-01/02
ATF22V10C/CQ DELTA TCO VS. OUTPUT LOADING
8.0 7.0 DELTA T CO (ns) DELTA T CO (ns) 6.0 5.0 4.0 3.0 2.0 1.0 0.0 50 100 150 200 250 300
ATF22V10C/CQ DELTA TCO VS. NUMBER OF SWITCHING
0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
NUMBER OF OUTPUTS LOADING
NUMBER OF OUTPUTS SWITCHING
12
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
ATF22V10C(Q) Ordering Information
tPD (ns) 5 7.5 tS (ns) 3 3.5 tCO (ns) 4 4.5 Ordering Code ATF22V10C-5JC ATF22V10C-7JC ATF22V10C-7PC ATF22V10C-7SC ATF22V10C-7XC ATF22V10C-7JI 10 4.5 6.5 ATF22V10C-10JC ATF22V10C-10PC ATF22V10C-10SC ATF22V10C-10XC ATF22V10C-10JI ATF22V10C-10PI ATF22V10C-10SI ATF22V10C-10XI 15 10 8 ATF22V10C-15JC ATF22V10C-15PC ATF22V10C-15SC ATF22V10C-15XC ATF22V10C-15JI ATF22V10C-15PI ATF22V10C-15SI ATF22V10C-15XI 15 10 8 ATF22V10CQ-15JC ATF22V10CQ-15PC ATF22V10CQ-15SC ATF22V10CQ-15XC ATF22V10CQ-15JI ATF22V10CQ-15PI ATF22V10CQ-15SI ATF22V10CQ-15XI Package 28J 28J 24P3 24S 24X 28J 28J 24P3 24S 24X 28J 24P3 24S 24X 28J 24P3 24S 24X 28J 24P3 24S 24X 28J 24P3 24S 24X 28J 24P3 24S 24X Operation Range Commercial (0C to 70C) Commercial (0C to 70C)
Industrial (-40C to 85C) Commercial (0C to 70C)
Industrial (-40C to 85C)
Commercial (0C to 70C)
Industrial (-40C to 85C)
Commercial (0C to 70C)
Industrial (-40C to 85C)
Using "C" Product for Industrial
To use commercial product for Industrial temperature ranges, down-grade one speed grade from the "I" to the "C" device (7 ns "C" = 10 ns "I") and de-rate power by 30%.
Package Type 28J 24P3 24S 24X 28-lead, Plastic J-leaded Chip Carrier (PLCC) 24-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 24-lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC) 24-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP)
13
0735P-PLD-01/02
Packaging Information
28J - PLCC
1.14(0.045) X 45 PIN NO. 1 IDENTIFIER 1.14(0.045) X 45 0.318(0.0125) 0.191(0.0075)
E1 B
E
B1
D2/E2
e D1 D A A2 A1
0.51(0.020)MAX 45 MAX (3X)
SYMBOL A A1 A2 D D1 E Notes: 1. This package conforms to JEDEC reference MS-018, Variation AB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. E1 D2/E2 B B1 e
COMMON DIMENSIONS (Unit of Measure = mm) MIN 4.191 2.286 0.508 12.319 11.430 12.319 11.430 9.906 0.660 0.330 NOM - - - - - - - - - - 1.270 TYP MAX 4.572 3.048 - 12.573 11.582 12.573 11.582 10.922 0.813 0.533 Note 2 Note 2 NOTE
10/04/01 2325 Orchard Parkway San Jose, CA 95131 TITLE 28J, 28-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING NO. 28J REV. B
R
14
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
24P3 - PDIP
D
PIN 1
E1
A
SEATING PLANE
L B1 e E B
A1
C eC eB
SYMBOL A A1 D E E1 B Notes: 1. This package conforms to JEDEC reference MS-001, Variation AF. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). B1 L C eB eC e
COMMON DIMENSIONS (Unit of Measure = mm) MIN - 0.381 31.623 7.620 6.096 0.356 1.270 2.921 0.203 - 0.000 NOM - - - - - - - - - - - MAX 5.334 - 32.131 8.255 7.112 0.559 1.551 3.810 0.356 10.922 1.524 Note 2 Note 2 NOTE
2.540 TYP
09/28/01 2325 Orchard Parkway San Jose, CA 95131 TITLE 24P3, 24-lead (0.300"/7.62 mm Wide) Plastic Dual Inline Package (PDIP) DRAWING NO. 24P3 REV. C
R
15
0735P-PLD-01/02
24S - SOIC
Dimensions in Millimeters and (Inches) Controlling dimension: Inches JEDEC STANDARD MS-013
0.51 (0.020) 0.33 (0.013)
7.60(0.2992) 7.40(0.2914) PIN 1 ID PIN 1 1.27(0.050) BSC
10.65(0.419) 10.00(0.394)
15.60(0.6141) 15.20(0.5985)
2.65(0.1043) 2.35(0.0926)
0.30(0.0118) 0.10(0.0040)
0 ~ 8
0.32(0.0125) 0.23(0.0091) 1.27(0.050) 0.40(0.016)
04/11/2001 2325 Orchard Parkway San Jose, CA 95131 TITLE 24S, 24-lead (0.300" body) Plastic Gull Wing Small Outline (SOIC) DRAWING NO. 24S REV. A
R
16
ATF22V10C(Q)
0735P-PLD-01/02
ATF22V10C(Q)
24X - TSSOP
Dimensions in Millimeter and (Inches)* JEDEC STANDARD MO-153 AD Controlling dimension: millimeters 0.30(0.012) 0.19(0.007)
4.48(0.176) 4.30(0.169)
6.50(0.256) 6.25(0.246)
PIN 1 0.65(0.0256)BSC
7.90(0.311) 7.70(0.303) 1.20(0.047)MAX
0.15(0.006) 0.05(0.002)
0 ~ 8
0.20(0.008) 0.09(0.004) 0.75(0.030) 0.45(0.018)
04/11/2001 2325 Orchard Parkway San Jose, CA 95131 TITLE 24X, 24-lead (4.4 mm body width) Plastic Thin Shrink Small Outline Package (TSSOP) DRAWING NO. 24X REV. A
R
17
0735P-PLD-01/02
Atmel Headquarters
Corporate Headquarters
2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600
Atmel Operations
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Atmel Corporate 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 436-4270 FAX 1(408) 436-4314
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Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369
Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom
Atmel Grenoble Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France TEL (33) 4-76-58-30-00 FAX (33) 4-76-58-34-80
ASIC/ASSP/Smart Cards
Atmel Rousset Zone Industrielle 13106 Rousset Cedex, France TEL (33) 4-42-53-60-00 FAX (33) 4-42-53-60-01 Atmel Colorado Springs 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759 Atmel Smart Card ICs Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) 1355-803-000 FAX (44) 1355-242-743
Japan
Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581
e-mail
literature@atmel.com
Web Site
http://www.atmel.com
(c) Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems.
Atmel (R) is a registered trademark of Atmel. Terms and product names in this document may be trademarks of others.
Printed on recycled paper.
0735P-PLD-01/02 0M


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